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NCV8667 150 mA LDO Regulator with Enable, Reset and Early Warning
The NCV8667 is 150 mA LDO regulator with integrated reset and early warning functions dedicated for microprocessor applications. Its robustness allows NCV8667 to be used in severe automotive environments. Very low quiescent current as low as 28 mA typical for NCV8667 makes it suitable for applications permanently connected to battery requiring very low quiescent current with or without load. The Enable function can be used for further decrease of quiescent current in shutdown mode to 1 mA. The NCV8667 contains protection functions as current limit, thermal shutdown and reverse output current protection.
Features http://onsemi.com MARKING DIAGRAMS
14 14 1 SO-14 D SUFFIX CASE 751A 1 = Timing and Reset Threshold Option* = Early Warning Option* = Voltage Option 5.0 V (XX = 50) = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package V8667YZXXG AWLYWWG
* * * * * * * * * *
* * * * *
Output Voltage Options: 5 V Output Voltage Accuracy: $2% Output Current up to 150 mA Very Low Quiescent Current: - typ 28 mA for Adjustable Early Warning Threshold Option Very Low Dropout Voltage Early Warning Threshold Accuracy: 10% Over Temperature Range Enable Function (1 mA Max Quiescent Current when Disabled) Microprocessor Compatible Control Functions: - Reset with Adjustable Power-on Delay - Early Warning Wide Input Voltage Operation Range: up to 40 V Protection Features: - Current Limitation - Thermal Shutdown - Reverse Output Current These are Pb-Free Devices Body Control Module Instruments and Clusters Occupant Protection and Comfort Powertrain
Y Z XX A WL Y WW G
*See Application Information Section.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.
Typical Applications
(c) Semiconductor Components Industries, LLC, 2010
December, 2010 - Rev. 0
1
Publication Order Number: NCV8667/D
NCV8667
VBAT Cin 0.1 mF RSI2 RSI1 Vin SI NCV8667y0 DT SO
OFF ON
Vout Cout 2.2 mF
VDD
Microprocessor I/O RESET
EN
GND
RO
Figure 1. Application Circuit
Vin ** Driver with Current Limit **
Vout
RO TIMING CIRCUIT and RESET OUTPUT DRIVER and SENSE OUTPUT DRIVER SO
Thermal Shutdown
Vref
EN SI
Enable
V ref GND
DT *
*Pull-down Resistor (~150 kW) active only in Reset State. ** 5 V option only.
Figure 2. Simplified Block Diagram
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NCV8667
EN DT GND GND GND GND RO SO-14 1 14 SI Vin GND GND GND Vout SO
Figure 3. Pin Connections
(Top View)
PIN FUNCTION DESCRIPTION
Pin No. 1 2 3, 4, 5, 6, 10, 11, 12 7 8 9 13 14 Pin Name EN DT GND RO SO Vout Vin SI Enable Input; low level disables the IC. Reset Delay Time Select. Short to GND or connect to Vout to select time. Power Supply Ground. Reset Output. 30 kW internal Pull-Up resistor connected to Vout. RO goes Low when Vout drops by more than 7% (typ.) from its nominal value. Early Warning Output. 30 kW internal Pull-Up resistor connected to Vout. It can be used to provide early warning of an impending reset condition. Leave open if not used. Regulated Output Voltage. Connect 2.2 mF capacitor with ESR < 100 W to ground. Positive Power Supply Input. Connect 0.1 mF capacitor to ground. Sense Input; If not used, connect to Vout. See Electrical Characteristics Table and Application Information sections for more information. Description
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NCV8667
ABSOLUTE MAXIMUM RATINGS
Rating Input Voltage DC (Note 1) Input Voltage Transient (Note 1) Input Current Output Voltage (Note 2) Output Current Enable Input Voltage DC Enable Input Voltage Transient Enable Input Current Range DT (Reset Delay Time Select) Voltage DT (Reset Delay Time Select) Current Reset Output Voltage Reset Output Current Sense Input Voltage DC Sense Input Voltage Transient Sense Input Current Sense Output Voltage Sense Output Current Maximum Junction Temperature Storage Temperature ESD Capability, Human Body Model (Note 3) ESD Capability, Machine Model (Note 3) Lead Temperature Soldering Reflow (SMD Styles Only) (Note 4) Symbol Vin Vin Iin Vout Iout VEN VEN IEN VDT IDT VRO IRO VSI VSI ISI VSO ISO TJ(max) TSTG ESDHBM ESDMM TSLD Min -0.3 - -5 -0.3 -3 -0.3 - -1 -0.3 -1 -0.3 -3 -0.3 - -1 -0.3 -3 -40 -55 -2 -200 - Max 40 45 - 5.5 Current Limited 40 45 1 5.5 1 5.5 3 40 45 1 5.5 3 150 150 2 200 265 peak Unit V V mA V mA V V mA V mA V mA V V mA V mA C C kV V C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. 5.5 or (Vin + 0.3 V), whichever is lower 3. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC-Q100-002 (EIA/JESD22-A114) ESD Machine Model tested per AEC-Q100-003 (EIA/JESD22-A115) 4. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
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NCV8667
THERMAL CHARACTERISTICS
Rating Thermal Characteristics, SO-14 (Note 5) Thermal Resistance, Junction-to-Air (Note 6) Thermal Reference, Junction-to-Pin4 (Note 6) Symbol RJA YJP4 Value 94 18 Unit C/W
5. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 6. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
OPERATING RANGES (Note 7)
Rating Input Voltage (Note 8) Junction Temperature Symbol Vin TJ Min 5.5 -40 Max 40 150 Unit V C
7. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 8. Minimum Vin = 5.5 V or (Vout + VDO), whichever is higher.
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VEN = 3 V, VDT = GND, VSI = Vout, RSI1 & RSI2 not used, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ = 25C, for min/max values TJ = -40 C to 150C; unless otherwise noted. (Notes 9 and 10)
Parameter REGULATOR OUTPUT Output Voltage (Accuracy %) Vin = 5.6 V to 40 V, Iout = 0.1 mA to 100 mA Vin = 5.8 V to 16 V, Iout = 0.1 mA to 150 mA TJ = -40C to 125C Vin = 5.8 V to 28 V, Iout = 0 mA to 150 mA Vin = 6 V to 28 V, Iout = 5 mA Iout = 0.1 mA to 150 mA Iout = 100 mA Iout = 150 mA Iout = 0 mA to 150 mA Vout 4.9 4.9 (-2 %) 4.9 (-2 %) -20 -40 - - 2.2 0.01 5.0 5.0 5.1 5.1 (+2%) 5.1 (+2%) 20 40 450 600 100 100 V Test Conditions Symbol Min Typ Max Unit
Output Voltage (Accuracy %)
Vout
5.0 0 10 225 300 - -
V
Line Regulation Load Regulation Dropout Voltage (Note 11) Output Capacitor for Stability (Note 12)
Regline Regload VDO Cout ESR
mV mV mV mF W
DISABLE AND QUIESCENT CURRENTS Disable Current Quiescent Current, Iq = Iin - Iout CURRENT LIMIT PROTECTION Current Limit Short Circuit Current Limit Vout = 0.96 x Vout_nom Vout = 0 V VEN = 0 V, Iout = -1 mA f = 100 Hz, 0.5 Vpp ILIM ISC Vout_rev PSRR 205 205 - - 525 525 mA mA VEN = 0 V,TJ < 85C Iout = 0.1 mA, TJ = 25C Iout = 0.1 mA to 150 mA, TJ 125C IDIS Iq - - - - 28 - 1 35 37 mA mA
REVERSE OUTPUT CURRENT PROTECTION Reverse Output Current Protection PSRR Power Supply Ripple Rejection (Note 12) - 60 - dB - 2 5.5 V
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. 12. Values based on design and/or characterization. 13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options.
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NCV8667
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VEN = 3 V, VDT = GND, VSI = Vout, RSI1 & RSI2 not used, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ = 25C, for min/max values TJ = -40 C to 150C; unless otherwise noted. (Notes 9 and 10)
Parameter ENABLE Enable Input Threshold Voltage Logic Low Logic High Enable Input Current Logic High VEN = 5 V Logic Low VEN = 0 V, TJ < 85 C Vth(EN) - 2.5 - - - - 3 0.5 0.8 - 5 1 V Test Conditions Symbol Min Typ Max Unit
IEN_ON IEN_OFF
A
DT (Reset Delay Time Select) DT Threshold Voltage Logic Low Logic High VDT = 5 V Vout decreasing Vin > 5.5 V Vth(DT) - 2 - - - - 0.8 - 1 V
DT Input Current RESET OUTPUT RO Output Voltage Reset Threshold (Note 13) Reset Hysteresis Maximum Reset Sink Current Reset Output Low Voltage Reset Output High Voltage Integrated Reset Pull Up Resistor Reset Delay Time (Note 13) Reset Reaction Time (see Figure 29) EARLY WARNING (SI and SO) Sense Input Threshold (NCV8667y0) High Low
IDT VRT VRH
A
90 - 1.75 - 4.5 15 6.4 102.4 16
93 2.0 - 0.15 - 30 8 128 25
96 - - 0.25 - 50 9.6 153.6 38
%Vout %Vout mA V V kW ms s
Vout = 4.5 V, VRO = 0.25 V Vout > 1 V, IRO < 200 mA
IROmax VROL VROH RRO
DT connected to GND DT connected to Vout
tRD tRR
VSI(th)
1.25 1.20 -1 15 - 4.5 1.75 - -
1.33 1.25 0.1 30 0.15 - - 7 3.8
1.40 1.33 1 50 0.25 - - 12 5.0
V
Sense Input Current (NCV8667y0) Integrated Sense Output Pull Up Resistor Sense Output Low Voltage Sense Output High Voltage Maximum Sense Output Sink Current SI High to SO High Reaction Time SI Low to SO Low Reaction Time THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 12) Thermal Shutdown Hysteresis (Note 12)
VSI = 5 V
ISI RSO
A kW V V mA s s
VSI < 1.2 V, ISO < 200 mA, Vout > 1 V
VSOL VSOH ISOmax tPSOLH tPSOHL
Vout = 4.5 V, VSI < 1.2 V, VSO = 0.25 V VSI increasing VSI decreasing
TSD TSH
150 -
175 25
195 -
C C
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. 12. Values based on design and/or characterization. 13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options.
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NCV8667
TYPICAL CHARACTERISTICS
32 Iq, QUIESCENT CURRENT (mA) 30 29 28 27 26 25 24 23 Vin = 13.2 V Iout = 100 mA 0 20 40 60 80 100 120 140 160 Iq, QUIESCENT CURRENT (mA) 31 200
Iout = 0 mA TJ = 25C
150
100
50
22 -40 -20
0 0
5
10
15
20
25
30
35
40
TJ, JUNCTION TEMPERATURE (C)
Vin, INPUT VOLTAGE (V)
Figure 4. Quiescent Current vs. Temperature
Figure 5. Quiescent Current vs. Input Voltage
33 Iq, QUIESCENT CURRENT (mA) 32 31 30 29 28 27 26 25 24 23 22 0 25 50 75 100 Vin = 13.2 V 125 150 Iout, OUTPUT CURRENT (mA) TJ = 25C Vout, OUTPUT VOLTAGE (V) TJ = 150C TJ = -40C
5.10
Vin = 13.2 V Iout = 100 mA
5.05
5.00
4.95
4.90 -40 -20
0
20
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (C)
Figure 6. Quiescent Current vs. Output Current
Figure 7. Output Voltage vs. Temperature
6 Vout, OUTPUT VOLTAGE (V) 5 4 3 2 1 TJ = 150C 0 0 1 2 3 TJ = 25C
VDO, DROPOUT VOLTAGE (mV)
Iout = 1.0 mA
500 400 300 200 100 0 0 TJ = 150C TJ = 25C
TJ = -40C 4 5 6 7 8
TJ = -40C
25
50
75
100
125
150
Vin, INPUT VOLTAGE (V)
Iout, OUTPUT CURRENT (mA)
Figure 8. Output Voltage vs. Input Voltage
Figure 9. Dropout vs. Output Current
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NCV8667
TYPICAL CHARACTERISTICS
500 VDO, DROPOUT VOLTAGE (mV) 400 300 Iout = 100 mA 200 100 0 -40 -20 ILIM, ISC, CURRENT LIMIT (mA) 400 ISC @ Vout = 0 V 300 ILIM @ Vout = 4.8 V 200 TJ = 25C
Iout = 150 mA
100
0
20
40
60
80
100 120 140 160
0
0
5
10
15
20
25
30
35
40
TJ, JUNCTION TEMPERATURE (C)
Vin, INPUT VOLTAGE (V)
Figure 10. Dropout vs. Temperature
400 ILIM, ISC, CURRENT LIMIT (mA) 100 ESR, STABILITY REGION (W)
Figure 11. Output Current Limit vs. Input Voltage
Vin = 13.2 V TJ = -40C to 150C Cout = 2.2 mF - 100 mF
Vin = 13.2 V
350 ISC @ Vout = 0 V 300 ILIM @ Vout = 4.8 V 250
10
1
STABLE REGION
0.1
200 -40 -20
0
20
40
60
80
100 120 140 160
0.01
0
50
100
150
200
250
300
350
TJ, JUNCTION TEMPERATURE (C)
Iout, OUTPUT CURRENT (mA)
Figure 12. Output Current Limit vs. Temperature
Figure 13. Cout ESR Stability vs. Output Current
14.2 V Vin (1 V/div)
13 V
TJ = 25C I Iout = 1 mA Cout = 10 mF trise/fall = 1 ms (Vin) 12.2 V
Iout (100 mA/div)
150 mA
TJ = 25C Vin = 13.2 V Cout = 10 mF trise/fall = 1 ms (Iout) 0.1 mA
5.09 V 5V 5V 4.97 V
5.16 V
Vout (50 mV/div)
Vout (200 mV/div)
4.77 V
TIME (100 ms/div)
TIME (20 ms/div)
Figure 14. Line Transients
Figure 15. Load Transients
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NCV8667
TYPICAL CHARACTERISTICS
TJ = 25C Rout = 5 kW Vin (5 V/div)
100 90 80 70 PSRR (dB) 60 50 40 30 20 10 0 TJ = 25C Vin = 13.2 V $0.5 VPP Cout = 2.2 mF Iout = 1 mA
Vout (5 V/div)
VRO (5 V/div) VSO (5 V/div) TIME (100 ms/div)
10
100
1000 f, FREQUENCY (Hz)
10000
100000
Figure 16. Power Up and Down Transient
2 1.8 IDIS, DISABLE CURRENT (mA) 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (C) IDIS, DISABLE CURRENT (mA) Vin = 13.2 V VEN = 0 V 1 0.8 0.6 0.4 0.2 0 0
Figure 17. PSRR vs. Frequency
VEN = 0 V TJ = 150C
TJ = -40C TJ = 25C 5 10 15 20 25 30 VIN, INPUT VOLTAGE (V) 35 40
Figure 18. Disable Current vs. Temperature
Figure 19. Disable Current vs. Input Voltage
50 40 30 TJ = -40C 20 TJ = 25C 10 0 Vin = 13.2 V 0 5 10 15 20 25 30 35 40 VEN, ENABLE VOLTAGE (V) TJ = 150C VRT, RESET THRESHOLD (V) IEN, ENABLE CURRENT (mA)
4.80
Vin = 13.2 V
4.75
4.70
4.65
4.60 -40 -20
0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (C)
Figure 20. Enable Current vs. Enable Voltage
Figure 21. Reset Threshold vs. Temperature
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NCV8667
TYPICAL CHARACTERISTICS
140 tRD, RESET DELAY TIME (ms) 120 100 80 60 40 20 0 -40 -20 VDT = GND 0 20 40 60 80 100 120 140 160 1.36 Vin = 13.2 V SENSE INPUT VOLTAGE (V) 1.34 1.32 1.3 1.28 1.26 1.24 1.22 -40 -20 VSI_(th),L (VSI Decreasing) VSI_(th),H (VSI Increasing)
VDT = Vout
0
20
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 22. Reset Time vs. Temperature
Figure 23. SI Threshold vs. Temperature
Vin
Vout t
t tRD tRR
VROH VROL t
Figure 24. Reset Function and Timing Diagram
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NCV8667
Vin
Vin_EW(th)_L
Vout
t
VRT V RO t
VSO
t
tWarning
t
Figure 25. Input Voltage Early Warning Function Diagram
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NCV8667
DEFINITIONS
General
All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature.
Output Voltage
the device is capable to supply minimum 200 mA without sending Reset signal to microprocessor. Short Circuit Current Limit is output current value measured with output of the regulator shorted to ground.
PSRR
The output voltage parameter is defined for specific temperature, input voltage and output current values or specified over Line, Load and Temperature ranges.
Line Regulation
Power Supply Rejection Ratio is defined as ratio of output voltage and input voltage ripple. It is measured in decibels (dB).
Line Transient Response
The change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range.
Load Regulation
Typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope.
Load Transient Response
The change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range.
Dropout Voltage
Typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low-load and high-load conditions.
Thermal Protection
The input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. It is measured when the output drops 100 mV below its nominal value. The junction temperature, load current, and minimum input supply requirements affect the dropout level.
Quiescent Current
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175C, the regulator turns off. This feature is provided to prevent failures from accidental overheating.
Maximum Package Power Dissipation
Quiescent Current (Iq) is the difference between the input current (measured through the LDO input pin) and the output load current.
Current Limit and Short Circuit Current Limit
The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower.
Current Limit is value of output current by which output voltage drops below 96% of its nominal value. It means that
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NCV8667
APPLICATIONS INFORMATION The NCV8667 regulator is self-protected with internal thermal shutdown and internal current limit. Typical characteristics are shown in Figures 4 to 25. A ceramic or tantalum 0.1 mF capacitor is recommended and should be connected close to the NCV8667 package. Higher capacitance and lower ESR will improve the overall line and load transient response. If extremely fast input voltage transients are expected then appropriate input filter must be used in order to decrease rising and/or falling edges below 50 V/ms for proper operation. The filter can be composed of several capacitors in parallel.
Output Decoupling (Cout) Input Decoupling (Cin) RESET DELAY AND RESET THRESHOLD OPTIONS
Part Number NCV86671z NOTE: DT = GND Reset Time 8 ms DT = Vout Reset Time 128 ms Reset Threshold 93%
The timing values can be selected from following list: 8, 16, 32, 64, 128 ms. The reset threshold values can be selected from the following list: 90% and 93%. Contact factory for other timing combinations not included in the table.
Sense Input (SI)/Sense Output (SO) Voltage Monitor
The NCV8667 is a stable component and does not require a minimum Equivalent Series Resistance (ESR) for the output capacitor. Stability region of ESR vs. Output Current is shown in Figure 13. The minimum output decoupling value is 2.2 mF and can be augmented to fulfill stringent load transient requirements. The regulator works with ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load transient response.
Enable Operation
The Enable pin will turn the regulator on or off. The threshold limits are covered in the electrical characteristics table in this data sheet.
Reset Delay Time Select
Selection of the NCV8667yz devices and the state of the DT pin determines the available Reset Delay times. The part is designed for use with DT tied to ground or OUT, but may be controlled by any logic signal which provides a threshold between 0.8 V and 2 V. The default condition for an open DT pin is the slower Reset time (DT = GND condition). Times are in pairs and are highlighted in the chart below. Consult factory for availability. The Delay Time select (DT) pin is logic level controlled and provides Reset Delay time per the chart. Note the DT pin is sampled only when RO is low, and changes to the DT pin when RO is high will not effect the reset delay time.
Reset Operation
An on-chip comparator is available to provide early warning to the microprocessor of a possible reset signal. The reset signal typically turns the microprocessor off instantaneously. This can cause unpredictable results with the microprocessor. The signal received from the SO pin will allow the microprocessor time (TWARNING) to complete its present task before shutting down. This function is performed by a comparator referenced to the band gap voltage. The actual trip point can be programmed externally using a resistor divider to the input monitor (SI). (See Figure 1) The values for RSI1 and RSI2 are selected for a typical threshold of 1.2 V on the SI pin according to Equations 1 and 2, where Vin_EW(th) is demanded value of input voltage at which Early Warning signal has to be generated. RSI2 is recommended to be selected in range of 100 kW to 1 MW. The higher are values of resistors RSI1 and RSI2 the lower is current flowing through the resistor divider, however this also increases a delay between Input voltage and SI input voltage caused by charging SI input capacitance with higher RC constant. The delay can be lowered by decreasing the resistors values with consequence of resistor divider current is increased.
V in_EW(th) + 1.25 1 ) RSI1 RSI2 *1 (eq. 1)
R SI1 + R SI2
V in_EW(th) 1.2
(eq. 2)
Sense Output
A reset signal is provided on the Reset Output (RO) pin to provide feedback to the microprocessor of an out of regulation condition. The timing diagram of reset function is shown in Figure 24. This is in the form of a logic signal on RO. Output voltage conditions below the RESET threshold cause RO to go low. The RO integrity is maintained down to Vout = 1.0 V. The Reset Output (RO) circuitry includes internal pull-up connected to the output (Vout) No external pull-up is necessary. Reset signal is also generated in case when input voltage decreases below its minimum operating limit.
The Sense Output is from an open drain driver with an internal 30 kW pull up resistor to Vout. Figure 26 shows the SO Monitor timing waveforms as a result of the circuit depicted in Figure 1. If the input voltage decreases the output voltage decreases as well. If the SI input low threshold voltage is crossed it causes the voltage on the SO output goes low sending a warning signal to the microprocessor that a reset signal may occur in a short period of time. TWARNING is the time the microprocessor has to complete the function it is currently working on and get ready for the reset shutdown signal.
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NCV8667
V out
V SI V SI,Low V RO
on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the NCV8667 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the NCV8667 can handle is given by:
P D(MAX) + T J(MAX) * T A R qJA (eq. 3)
V SO
T WARNING
Figure 26. SO Warning Timing Diagram
Since TJ is not recommended to exceed 150C, then the NCV8667 soldered on 645 mm2, 1 oz copper area, FR4 can dissipate up to 1.33 W when the ambient temperature (TA) is 25C. See Figure 28 for RthJA versus PCB area. The power dissipated by the NCV8667 can be calculated from the following equations:
P D [ V in I q@I out ) I out V in * V out (eq. 4)
Sense Input VSI,High
or
V in(MAX) [ P D(MAX) ) V out I out ) I q I out (eq. 5)
120 RqJA, THERMAL RESISTANCE (C/W) VSI,Low 110 PCB 1 oz Cu
100 90 PCB 2 oz Cu 80 70 60
Sense Output High
t t PSOLH t PSOHL
Low t
0
100 200 300 400 500 600 COPPER HEAT SPREADER AREA (mm2)
700
Figure 27. Sense Input to Sense Output Timing Diagram Thermal Considerations
Figure 28. Thermal Resistance vs. PCB Copper Area Hints
As power in the NCV8667 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration
ORDERING INFORMATION
Output Voltage 5.0 V Reset Delay Time DT = GND/Vout 8/128 ms
Vin and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCV8667 and make traces as short as possible.
Device NCV866710D250R2G
Reset Threshold (Typ) 93 %
Marking V86671050G
Package SO-14 (Pb-Free)
Shipping 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D
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NCV8667
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE J
8
-A-
14
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
G C -T-
SEATING PLANE
R X 45 _
F
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
SOLDERING FOOTPRINT
7X
7.04 1 0.58
14X
14X
1.52
1.27 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NCV8667/D

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